SEU-tolerant System Design of SRAM FPGA Based on Scrubbing in Aerospace
-
摘要: 基于SRAM工艺的FPGA在空间环境下容易受到单粒子翻转(Single Event Upsets, SEU)的影响而导致信息丢失或功能中断. 在详细讨论三模冗余(Triple Modular Redundancy, TMR)和刷新(Scrubbing)的重要原理及实现细节的基 础上, 实现了一种高可靠性、TMR+Scrubbing+Reload的容错系统设计, 用反熔丝型FPGA对SRAM型FPGA的配置数据进行毫秒级周期刷新, 同时对两个FPGA均做TMR处理. 该容错设计已实际应用于航天器电子系统, 可为高可靠性电子系统设计提供参考.
-
关键词:
- 单粒子翻转(SEU) /
- 三模冗余(TMR) /
- 刷新(Scrubbing) /
- FPGA容错
Abstract: Aerospace and extra-terrestrial applications on SRAM FPGA are sensitive to SEU which might result in information loss or functional interruption. In this paper, a detailed introduction to TMR and Scrubbing, which are the significant techniques of this design, was given; then, a highly reliable fault-tolerant system based on TMR, Scrubbing and Reload rules was implemented. An anti-fuse FPGA periodically scrubbed the configuration bitstream of SRAM FPGA in milliseconds level, and both FPGAs implemented triple module design redundancy. This fault-olerant design has been adopted in an actual spacecraft electronic system, which can make reference to the design of highly reliable electronic systems. -
-
计量
- 文章访问数: 3564
- HTML全文浏览量: 133
- PDF下载量: 2172
-
被引次数:
0(来源:Crossref)
0(来源:其他)